Denial

Hi,

I wanted to share my MCL65+ project which is a drop-in replacement and accelerator for the 6502 processor!

The 6502 is emulated in software running on a 600Mhz Arduino (Teensy4.1) which provides enough horsepower to emulate the CPU as well as the 6502 bus IO's. I also developed a small PCB which accepts the Teensy board as well as some buffers which allows it to be a drop-in replacement for the CPU. I have tested it so far with a VIC-20 and an Apple II+.

There is enough storage on the microcontroller to emulate expanded RAM and ROM for the VIC-20 which I used to max-out the RAM as well as emulate a number of cartridge games. The MCL65+ can emulate RAM/ROM as either cycle accurate to the original 6502, or in an accelerated mode in which the computer is many times faster than the original processor! The 6502 core even supports most of the undocumented opcodes which some applications require.

The project files are available on GitHub and I have a number of of the boards that I can distribute for those who are interested. The boards use through-hole devices and the software is built using the Arduino GUI, so this project should be accessible to a wide range of users.

Here are the project files: https://github.com/MicroCoreLabs/Projec ... r/MCL65%2B
Here are some more details in my blog: https://microcorelabs.wordpress.com

Thanks,
-Ted Fried

Hi, Ted,

now that is something which quite fits the description of a SuperCPU as has been discussed here in Denial off-and-on over the years!

As the original 6502 and the VIC take turns in each half of the 1 µs period to access the mainboard RAM, you quite probably need to put MCL65+ into waitstate while accessing $1000..$1FFF. The VIC chip can access the mainboard RAM ($0000..$03FF, $1000..$1FFF) and the character ROM ($8000..$8FFF) for graphics - the colour RAM has an extra path, BTW -, but it is quite rare for programs to use the lower 1K for display purposes, so in principle you should be fine to have $0000..$03FF as 'fast' RAM for the most time. Likewise, putting BASIC and KERNAL ($C000..$FFFF) into fast memory is also something you should try out.

Note some cartridge games try to overwrite themselves as sort of copy protection measure when they are soft-loaded to BLK5 ($A000..$BFFF), a ROM circuit of course would not be affected by this. For this reason you should consider a write-protect mechanism for the fast RAM.

Also, peripherals tend to be rather sensitive to timing - I would expect you need to throttle the speed when disk drives are accessed, for example. At least the VIA registers and also the VIC registers located in the range $9000..$93FF will need waitstates.

Greetings,

Michael

SuperCPU... Thats a cool name for it!

Interesting points on the VIC/6502 sharing the bus when accessing RAM... I designed the MCL65+ to emulate the 6502 cycle timing and bus interface like the original chip so it could be used as a drop-in replacement. I have not yet tried it with a VIC-20 disk drive, but it does work in cycle-accurate mode with the Apple II disk drive which is timing sensitive.

It would be an interesting update to normally run in accelerated mode, but when it detects that the disk drive is being accessed it temporarily drops down to cycle accurate mode.. then accelerates again once the disk access is done.

MicroCoreLabs wrote:SuperCPU... Thats a cool name for it!

Hehe, O.K. - it's actually the name of an Accelerator solution for the C64, based on a 65816 CPU and capable of doing at least an 8x speed-up (see here), but the name got into somewhat generic use while being discussed here in Denial.

One other thing: I see the design of your PCB only allows for use in the very first mainboard revision of the VIC-20. Later mainboard revisions placed the 6502 either at the bottom-right of the mainboard (second 2-prong revision) so your PCB would protrude beyond the bottom; or at the right side of the mainboard (CR revision) - there, your PCB will collide with the common mode choke of the 9 VAC supply and the main stabilizing capacitor of the 5 VDC rail.

Room in the (second main) 2-prong revision is somewhat constrained, but for the CR revision a mirrored layout of MCL65+ seems feasible - there is enough space above BASIC and KERNAL ROM.

A 40-pin ribbon cable extender could also probably work... This is just an experiment which seems to have worked. I published the project on GitHub so it should be easy if someone wanted to adapt the PCB to another form factor. I chose a two-sided PCB which costs $5 to manufacture, but Im sure the board could be made smaller and use surface mount parts for a little more cost.

That SuperCPU looks like a lot of fun! I ported my project to the 6502 because I have a VIC-20 and an Apple II+, but someone (maybe me) should port it to the 6510 and try it in a C64...

I have a dumb question: Would it be possible to emulate the C64 using the MCL65+ in a VIC-20? It would be a physical VIC-20 that is running the C64 BIOS and emulating/translating the C64 specific functionality such as video, sound, and other IOs... Maybe the two machines are just too different; however. believe there are projects which emulate the C64 but use VGA, PS/2, and sound converters...

MicroCoreLabs wrote:I have a dumb question: Would it be possible to emulate the C64 using the MCL65+ in a VIC-20? It would be a physical VIC-20 that is running the C64 BIOS and emulating/translating the C64 specific functionality such as video, sound, and other IOs... Maybe the two machines are just too different; however. believe there are projects which emulate the C64 but use VGA, PS/2, and sound converters...

No realistic chance, sorry. It's not the "BIOS" that matters here, anyhow BASIC and KERNAL (that's how the ROMs are actually called) are probably the most similar thing already in the two machines, beside the CPU.

The VIC-II in the C64 is much more capable (higher resolution, sprites, and more) than VIC-I in the VIC-20, the SID in the C64 produces much better sound than the audio part of VIC-I, the I/O chips are different (VIA vs. CIA) and you have no way to connect any replication of the C64 hardware over the mainboard to all the ports. Then, the cartridge port - alltogether different sets of mainboard signals and different pin pitch. Did I mention the missing joystick port?

You can put both computers into a FPGA (the DE10-Nano for example) but there you don't need to consider inter IC timing aspects for the most part, as all components (CPU, RAM, ROM, I/O) live within the FPGA and use modern peripherals for video, audio, controls and storage. So there ...

This would be really neat to get working on the C64. It uses a 6510, which is just a 6502 with a partial (6-bit) IO port at $00/$01. Unfortunately the pinout is also very different...

I am not further involved with the MCL project, but as the OP didn't respond here, I'd like to set straight some facts ...

r.cade wrote:This would be really neat to get working on the C64. It uses a 6510, which is just a 6502 with a partial (6-bit) IO port at $00/$01. [...]

... and the ability to tri-state the address bus upon external request. This is necessary on the C64 so VIC-II can do badlines and fetch sprite data. That means the 6510 also incorporates the two '245 address bus buffers otherwise present on the VIC-20 mainboard to separate the CPU and VIC side of the address bus during the VIC-I 'half' of the bus cycle.

Unfortunately the pinout is also very different...

That would be a lesser problem, as the current MCL design would merely require a re-layout of the CPU socket half.

Hi,

I am working on a 6510 version of the MCL65+ which can be used in a Commodore 64. A few more buffers are needed to support AEC and the Peripheral pins, but it is basically a 6510 layout of the system which works in the Apple II+ and the VIC-20.

Due to a shortage of pins on the Teensy 4.1 I will probably leave out the upper three Peripheral pins so the C64's cassette interface will not be supported. Hopefully this is ok...

I will try to make the board as small as possible and locate the Teensy board to the left of the 6510 so it will fit on hopefully all C64 motherboard versions .

Like the MCL65+, this board should allow for cycle accurate operation as well as accelerated modes which run at the microcontroller's 600Mhz+ speed as well as support memory banking and cartridge emulation using the 1MB of available RAM.

Here is an initial 3D rendering of the board:



I am open to suggestions, so please let me know.

Thanks,
-Ted

Mike wrote: ↑Sat Jan 09, 2021 4:35 pmHehe, O.K. - it's actually the name of an Accelerator solution for the C64, based on a 65816 CPU and capable of doing at least an 8x speed-up...

It used an overclocked 65816 which gave it a 20 MHz. speed.

...(see here)...

Hmm, that stub of an article seems to have some errors and is incomplete as well.

Truly,
Robert Bernardo
Fresno Commodore User Group - http://www.dickestel.com/fcug.htm
Southern California Commodore & Amiga Network - http://www.portcommodore.com/sccan

I need to post this in a Commodore 64 forum; but some users expressed an interest in a C64 drop-in accelerator...

I received my MCL64 board a few days ago and was able to successfully replace the 6510 in my Commodore 64!

https://microcorelabs.wordpress.com/202 ... modore-64/

When run in accelerated mode it appears to be around 2X faster than the Super CPU Commodore 64 accelerator board!

There are a few things I need to implement such as bank switching and the ability to load cartridge images, but the first results seem promising!

As this can access the full 64k then it could be a easy/inexpensive way for Mike's inbuilt 3k stuff to work for us mere mortals.
It would be nice to have the full memory range to play with.

So I see that on your page that the VIC20 dev wasn't as fast(+15%) as you had hope, does this mean the project has ground to a halt?

With 1 meg of memory this would make a great alternative to the cartridges and possible d1540 emulation.

Could just be the real ultimate addition to the vic.

I could probably get more acceleration out of the VIC-20, but I moved on fairly quickly to the Apple II+. I can revisit it if there is interest.

I was able to max out the VIC-20's memory and was able to test a number of cartridge images loaded into the MCL65+'s memory. it probably wouldn't be too difficult to emulate a disk drive as well.

Here are the acceleration results on the Commodore 64. The VIC-20 could achieve something similar.

https://microcorelabs.wordpress.com/202 ... modore-64/

MicroCoreLabs wrote: ↑Sun Apr 18, 2021 10:28 pm Here are the acceleration results on the Commodore 64. The VIC-20 could achieve something similar.

https://microcorelabs.wordpress.com/202 ... modore-64/

Interesting project!
Here’s some stuff that could help you, IMHO
http://wiki.icomp.de/wiki/C64_Benchmarks
https://www.c64-wiki.de/wiki/Turbo_Chameleon_64
BR